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رم MT48LC16M16A2P-6AIT TSOP54 SDR SDRAM- new&original

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نظر و رتبه بندی مشتریان

9118000

محصول جدید

415,000 ریال

رم MT48LC16M16A2P - کاملا نو و اورجینال

The MT48LC16M16A2P-6A IT is a 256Mb SDR SDRAM uses an internal pipelined architecture to achieve high-speed operation. This architecture is compatible with the 2n rule of prefetch architectures, but it also allows the column address to be changed on every clock cycle to achieve a high-speed, fully random access. Precharging one bank while accessing one of the other three banks will hide the precharge cycles and provide seamless, high-speed and random-access operation. This is a high-speed CMOS, dynamic random-access memory containing 268435456-bits. It is internally configured as a quad-bank DRAM with a synchronous interface. Read and write accesses to the SDRAM is burst-oriented, accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of an active command, which is then followed by a read or write command.
  • PC100 and PC133-compliant
  • Fully synchronous, all signals registered on positive edge of system clock
  • Internal banks for hiding row access/precharge
  • Auto precharge, includes concurrent auto precharge and auto refresh modes
  • Self refresh mode
  • LVTTL-compatible inputs and outputs

Applications

Communications & Networking

DRAM Memory Configuration:
    16M x 16bit
Access Time:
    6ns
Page Size:
    -
No. of Pins:
    54Pins
Memory Case Style:
    TSOP-II
Operating Temperature Min:
    -40°C
Operating Temperature Max:
    85°C
IC Interface Type:
    -
Product Range:
    -
MSL:
    MSL 3 - 168 hours

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